SC418
23
Applications Information (continued)
Capacitor Selection
The output capacitors are chosen based on required ESR
and capacitance. The maximum ESR requirement is con-
trolled by the output ripple requirement and the DC toler-
ance. The output voltage has a DC value that is equal to
the valley of the output ripple plus /2 of the peak-to-peak
ripple. Change in the output ripple voltage will lead to a
change in DC voltage at the output.
The design goal is for the output voltage regulation to be
?% under static conditions. The internal 500mV refer-
ence tolerance is %. Allowing % tolerance from the FB
resistor divider, this allows 2% tolerance due to V
OUT
ripple.
Since this 2% error comes from /2 of the ripple voltage,
the allowable ripple is 4%, or 42mV for a .05V output.
The maximum ripple current of 4.4A creates a ripple
voltage across the ESR. The maximum ESR value allowed
is shown by the following equations.
A
4
.
4
mV
42
I
V
ESR
RIPPLEMAX
RIPPLE
MAX
ESR
MAX
= 9.5 m&
The output capacitance is chosen to meet transient
requirements. A worst-case load release, from maximum
load to no load at the exact moment when inductor
current is at the peak, determines the required capaci-
tance. If the load release is instantaneous (load changes
from maximum to zero in < 祍), the output capacitor
must absorb all the inductors stored energy. This will
cause a peak voltage on the capacitor according to the
following equation.
2
OUT
2
PEAK
2
RIPPLEMAX
OUT
MIN
V
V
I
2
1
I
L
COUT
Assuming a peak voltage V
PEAK
of .50 (00mV rise upon
load release), and a 0A load release, the required capaci-
tance is shown by the next equation.
2
2
2
MIN
05
.
1
15
.
1
4
.
4
2
1
10
H
88
.
0
COUT
COUT
MIN
= 595礔
If the load release is relatively slow, the output capacitance
can be reduced. At heavy loads during normal switching,
when the FB pin is above the 500mV reference, the DL
output is high and the low-side MOSFET is on. During this
time, the voltage across the inductor is approximately
-V
OUT
. This causes a down-slope or falling di/dt in the
inductor. If the load di/dt is not faster than the -di/dt in
the inductor, then the inductor current will tend to track
the falling load current. This will reduce the excess induc-
tive energy that must be absorbed by the output capaci-
tor, therefore a smaller capacitance can be used.
The following can be used to calculate the needed capaci-
tance for a given dI
LOAD
/dt. Peak inductor current is shown
by the next equation.
I
LPK
= I
MAX
+ 1/2 x I
RIPPLEMAX
I
LPK
= 10 + 1/2 x 4.4 = 12.2A
dt
dl
Current
Load
of
change
of
Rate
LOAD
I
MAX
= maximum load release = 10A
OUT
PK
LOAD
MAX
OUT
LPK
LPK
OUT
V
V
2
dt
dl
I
V
I
L
I
C
Example
s
A
5
.
2
dt
dl
LOAD
This would cause the output current to move from 0A to
zero in 4祍 as shown by the following equation.
05
.
1
15
.
1
2
s
1
5
.
2
10
05
.
1
2
.
12
H
88
.
0
2
.
12
C
OUT
C
OUT
= 379礔
Note that C
OUT
is much smaller in this example, 379礔
compared to 595礔 based on a worst-case load release. To
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